发明名称 FAILURE ANALYSIS METHOD OF SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To estimate the cause of a failure at an early stage of a failure analysis, improve the accuracy of the failure analysis and shorten the analysis time. Ž<P>SOLUTION: An OBIRCH analysis is performed by scan-irradiating a laser light from a laser oscillator 6 via an optical system 7 to a sample SP placed on a stage 8 and by two-dimensional imaging of a power source current change on a control part 9. The reaction point where OBIRCH reaction is detected is spot-irradiated by the laser, and a tester control part 4 calculates a δIDDQ monitored by a tester 3. Wherein, the differential δIDDQ<SB>0</SB>when not irradiated by the laser between the IDDQ value Ig representing a normal value and the IDDQ value Ing representing an abnormal value is changed to the differential δIDDQ<SB>1</SB>on the laser irradiation, and a control part 9 determines based on the size of both δIDDQ<SB>0</SB>and δIDDQ<SB>1</SB>. For example, it is determined that if δIDDQ<SB>0</SB><δIDDQ<SB>1</SB>, the failure is caused by a diffusion layer, and if δIDDQ<SB>0</SB>>δIDDQ<SB>1</SB>, the failure is caused by a wiring short circuit. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010002251(A) 申请公布日期 2010.01.07
申请号 JP20080160152 申请日期 2008.06.19
申请人 RENESAS TECHNOLOGY CORP 发明人 SHIMASE AKIRA;MATSUMOTO MASAKAZU;HASEBE TADAYOSHI
分类号 G01R31/302;H01L21/66 主分类号 G01R31/302
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