发明名称 |
HIGH SHRINKAGE STRESS SILICON NITRIDE (SIN) LAYER FOR NFET IMPROVEMENT |
摘要 |
<p>HIGH SHRINKAGE STRESS SILICON NITRIDE (SIN) LAYER FOR NFET IMPROVEMENT A method (and semiconductor device) of forming a high shrinkage stressed silicon nitride layer for use as a contact etch stop layer (CESL) or capping layer in a stress management technique (SMT) provides increased tensile stress to a channel of an nFET device to enhance carrier mobility. A spin-on polysilazane-based dielectric material is applied to a semiconductor substrate and baked to form a film layer. The film layer is cured to remove hydrogen from the film which causes shrinkage in the film when it recrystallizes into silicon nitride. The resulting silicon nitride stressed layer introduces an increased level of tensile stress to the transistor channel region.</p> |
申请公布号 |
SG157304(A1) |
申请公布日期 |
2009.12.29 |
申请号 |
SG20090032392 |
申请日期 |
2009.05.12 |
申请人 |
CHARTERED SEMICONDUCTOR MANUFACTURING LTD |
发明人 |
LUONA GOH;JINGZE TIAN;WEI LU;SHENG ZHOU MEI |
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