发明名称 |
IN-SITU JITTER TOLERANCE TESTING FOR SERIAL INPUT OUTPUT |
摘要 |
According to some embodiments, a method and apparatus are provided to generate a sine wave via a jitter modulator to modulate a control voltage of a clock source. The jitter modulator is in-situ on a die. The sine wave is received at a clock and data recovery circuit comprising the clock source. The clock and data recovery circuit is in-situ on the die.
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申请公布号 |
US2009310728(A1) |
申请公布日期 |
2009.12.17 |
申请号 |
US20080139835 |
申请日期 |
2008.06.16 |
申请人 |
JAUSSI JAMES E;CASPER BRYAN K;MOONEY STEPHEN R |
发明人 |
JAUSSI JAMES E.;CASPER BRYAN K.;MOONEY STEPHEN R. |
分类号 |
H04L7/00 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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