发明名称 INTERFERENCE ELIMINATION APPARATUS AND INTERFERENCE ELIMINATION METHOD
摘要 <p>From a delay profile, path selectors 105a SIMILAR 105n discard the signals other than those corresponding to valid paths, such as noise, output the channel values, which are obtained through the selection of valid paths alone, to JD decoder 106, and output the received levels of the valid paths to multipliers 108a SIMILAR 108n. JD decoder 106 performs joint detection operation and multiplies the operation result by a received signal that is output from delayer 103. Allocator 107 separates the soft decision data of individual users on a per user basis. Multipliers 108a SIMILAR 108n multiply outputs of JD decoder and received levels output of path selectors 105a SIMILAR 105n. Error correction decoder 109a SIMILAR 109n performs the hard decision of the soft decision data so as to obtain each user's demodulation data. <IMAGE></p>
申请公布号 EP1349288(A4) 申请公布日期 2009.12.02
申请号 EP20020753227 申请日期 2002.08.05
申请人 PANASONIC CORPORATION 发明人 HAYASHI, MASAKI
分类号 H04L1/00;H04B1/10;H04B1/7105;H04J13/00;H04L1/22;H04L25/02;H04L25/03;(IPC1-7):H04B1/10 主分类号 H04L1/00
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