| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a memory architecture with multilevel hierarchy structure having a plurality of external ports. Ž<P>SOLUTION: Multi-port memory architecture having a multilevel hierarchy typically has one-port memory cells in the lowermost hierarchical level. The memory blocks in the respectively higher hierarchical levels are each made up of memory blocks from the next lower hierarchical level. By the defined multi-port memory architecture with multilevel hierarchy, the required surface area on the chip is reduced. The memory blocks in the hierarchical levels can, depending on requirement, be disposed in a memory block matrix in a switching network, a banking technique arrangement, and so forth. Thus, depending on the desired application, the greatest possible freedom of design is provided. The multi-port memory architecture also has a circuit for handling access conflict. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
|
