| 摘要 |
PROBLEM TO BE SOLVED: To provide an LDO voltage stabilizer as a semiconductor device in a simple configuration which obtains a high output current with low input and output voltage. SOLUTION: The voltage stabilizer is the semiconductor device wherein an operational amplifier 2 is connected to a gate electrode side of a P-type MOS transistor 1 for output and a gate bias voltage V<SB>G</SB>is applied to one semiconductor substrate. The voltage stabilizer is provided with a negative bias generation circuit 4 having a function of applying a negative bias voltage V<SB>M</SB>generated on the basis of input clock signals CLK to the negative side power terminal of the operational amplifier 2 by a field effect transistor for bias generation formed in the triple well region structure part of the one semiconductor substrate. When the operational amplifier 2 is operated between an input voltage on the positive pole side and the negative bias voltage on the negative pole side, amplification efficiency is improved, a voltage V<SB>GS</SB>between the gate and source of the P-type MOS transistor 1 for output is secured high, the gate bias voltage on the gate electrode side is maintained at the potential of≤0V, and the high output current is obtained with the low input/output voltage. COPYRIGHT: (C)2009,JPO&INPIT
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