| 摘要 |
A digital signal processing integrated circuit contains an array of interconnected and programmed or programmable digital signal processors (10). Configurable multiplexing circuits (12), are placed between IO connections (11a,b) and the IO ports of at least a plurality of the digital signal processors (10). The multiplexing circuits (12) are configured under control of configuration data, so that the multiplexing circuit (12) give the effect of accessing the IO connection only to IO signals from the IO port or ports of one or ones of the respective plurality of digital signal processors (10) that are selected by the configuration data. Preferably, each digital signal processor (10) has its IO part coupled in common to a plurality of the multiplexing circuits (12) separately from the other digital signal processing circuits. Preferably, the multiplexing circuit (12) is arranged to associate a control signal value for a peripheral circuit with respective, independently configurable IO signal values from different ones of the respective digital signal processors (10) respectively. |
