发明名称 Failure analysis apparatus
摘要 Relating with board numbers of the boards mounted with the logic circuits and mounted places on the boards and in relation to log information to be collected from the logic circuits, analysis information describing information to be processed when the log information is generated, information of a condition for which the log information is to be valid, and information of a condition for which the log information is to be invalid are defined for analyzing failures using the analysis information based on the logic circuits. Upon the realization of the failure analysis based on the logic circuits, the analysis information further describes information of the priority of the log information to realize a thorough analysis of critical failures.
申请公布号 US2009006896(A1) 申请公布日期 2009.01.01
申请号 US20080230241 申请日期 2008.08.26
申请人 FUJITSU LIMITED 发明人 NAKAGAWA MASATO
分类号 G06F11/07 主分类号 G06F11/07
代理机构 代理人
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