| 摘要 |
PURPOSE:To eliminate the need for a memory locking mechanism, by controlling reading and writing operations in successive cycles according to an exclusive data addition or subtraction request from a processor. CONSTITUTION:When a memory control circuit 33 knows the exclusive data addition or subtraction request from a processor 10 or 20, it sends the contents of a selected register among 311-313, and 321-323 to a memory device 40 continuously and also sends out a read request code to a selector 380 to read the memory device 40 and supply the contents to comparing circuits 360 and 361 and a counter 370. The memory control circuit 330 controls the reading and writing to and from the same address of the memory in successive cycles on the basis of comparison results. Therefore, the need for the memory locking mechanism is omitted. |
