| 摘要 |
PURPOSE:To define optional addresses as stop addresses at the same time by reading an instruction in an address where a stop is expected to be made, writing a parity bit and detecting a parity error, and the generating a stop signal. CONSTITUTION:Instructions are read out of program memory 1 with a step operation signal l when a program which uses 1 as an address stop ready signal (m) is executed. Read data (g) is sent to a parity checking circuit 4 and when it is defined as a stop address, a parity error signal (h) goes up to 1. The signal lis 0, so the parity error signal (h) is sent to an FF7 and stored at the rise of a read signal (i) and a stop signal (j) is outputted. Further, the signal l is 1 and the stop signal (m) is 1 in step operation; when an instruction is read out, the parity error signal (h) holds the stop signal (j) at 1 without fail, thereby stopping the execution of the program. When a restart signal (k) is generated, the program is executed by one step. |
