发明名称 WIRING CHECKER
摘要 PURPOSE:To improve reliability by reading connection information out of a memory part with a timing clock from an address timing circuit, comparing it with the output of a signal detection register, and sending out an error output unless they coincide with each other. CONSTITUTION:The 1st and the 2nd connector plugs 3 and 4 are connected to connectors and pieces of connection information are inputted from an input terminal 11 to the RAM memory part 7. Then an address diming circuit 6 operates a switch switching circuit 2 with the 1st clock signal 13 and applies the voltage of a power source 12 to terminals of the connectors through an input terminal 1, and then the outputs of the connectors are stored in a signal detection register 5 through the 2nd connector plug 4. Then, the outputs of the connectors from the register 5 and information from the memory part 7 are inputted to a matching detection part 8 with the 2nd clock signal 14 from the circuit 6 and the detection part 8 compares those pieces of information and sends out an error output to an output terminal 9 unless they coincide with each other.
申请公布号 JPS62187259(A) 申请公布日期 1987.08.15
申请号 JP19860029490 申请日期 1986.02.13
申请人 NEC CORP 发明人 YAMAGUCHI MASARU;AOKI SEIICHI
分类号 G01R31/02;H05K7/02 主分类号 G01R31/02
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