| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To solve the problem that the processing speed of a plurality of parallel image processing means may be different, so that the whole processing speed is reduced because the preceding image processing means has to wait. <P>SOLUTION: Encoding circuits 103, 104 perform image processing of each region. A frame memory 107 is shared by the respective encoding circuits. A processing progress information input means in an arbiter 108 inputs progress information which shows the progress of image processing performed by each encoding circuit using the frame memory 107. A processing progress information comparing means in the arbiter 108 compares the progress information. A processing progress sequence computing means in the arbiter 108 computes the sequence of the delayed encoding circuits based on the result of the processing progress information comparing means. An access right to the frame memory 107 is given preferentially in sequence from the encoding circuit which is delayed, based on the sequence computed by the processing progress sequence computing means. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
