| 摘要 |
PROBLEM TO BE SOLVED: To easily generate a stable reference potential. SOLUTION: The ferroelectric memory device that uses a memory cell constituted of a combination of one transistor and one ferroelectric capacitor is provided with a plurality of bit lines (BL), a plurality of reference bit lines (DBL) making pairs with the plurality of bit lines, a plurality of word lines (WL) intersecting with the pluralities of bit lines and reference bit lines, a plurality of memory cells connected to intersection positions between the pluralities of word and bit lines, a plurality of reference word lines (DWL) intersecting with the pluralities of bit lines and reference bit lines, a plurality of memory cells substantially same in constitution as the plurality of memory cells and connected to intersection positions between the reference word lines and the reference bit lines, and a plurality of latch type sense amplifiers (32-1) connected between the pairs of bit lines and reference bit lines. COPYRIGHT: (C)2006,JPO&NCIPI
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