发明名称 Semiconductor memory device with reduced number of channels for test operation
摘要 A semiconductor memory device includes a plurality of memory banks, a data pin for inputting and outputting data, and input/output buffers connected to the data pin. Each of the memory banks has a plurality of memory cells for storing the data. The data pin is enabled and disabled by a pin selection signal. The data pin performs a normal data input/output operation when the pin selection signal is enabled and a termination resistor connected to the data pin is off when the pin selection signal is disabled. The input/output buffers make a termination resistor connected to the data pin off when the pin selection signal is disabled.
申请公布号 US2008304345(A1) 申请公布日期 2008.12.11
申请号 US20070005441 申请日期 2007.12.26
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KWEAN KI-CHANG
分类号 G11C29/48 主分类号 G11C29/48
代理机构 代理人
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