| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To improve data write speed by speeding up verification operation. <P>SOLUTION: A memory cell array 1 is configured to have a plurality of memory cells arranged in a matrix form, each of the memory cells being connected to a word line and a bit line and being capable of storing n values (n is a natural number which is not smaller than 2). A control circuit 7 controls the potentials of the word line and bit line according to input data and writes data into a memory cell. The control circuit 7 writes data into the memory cell to a k-valued threshold voltage (k<=n) in a writing operation, precharges the bit line once, and then makes the potential of the word line change i times, to verify whether the memory cell has reached an i-valued (i<=k) threshold voltage. The control circuit 7 precharges the bit line, makes the potential of the word line change j times (j<=n), and reads data from the memory cell. <P>COPYRIGHT: (C)2009,JPO&INPIT</p> |
