发明名称 VIRTUAL MEMORY TRANSLATION WITH PRE-FETCH PREDICTION
摘要 <P>PROBLEM TO BE SOLVED: To increase address translation performance of computer systems including graphic rendering operation. <P>SOLUTION: This system facilitates virtual page translation. An embodiment of the system includes a processing device, a front end unit, and address translation logic. The processing device is configured to process data of a current block of data. The front end unit is coupled to the processing device. The front end unit is configured to access the current block of data in an electronic memory device and to send the current block of data to the processor for processing. The address translation logic is coupled to the front end unit and the electronic memory device. The address translation logic is configured to pre-fetch a virtual address translation for a predicted virtual address based on a virtual address of the current block of data. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008282396(A) 申请公布日期 2008.11.20
申请号 JP20080119958 申请日期 2008.05.01
申请人 VIVANTE CORP 发明人 LEE KEITH;GARRITSEN FRIDO
分类号 G06F12/10;G06F12/08;G06T1/60 主分类号 G06F12/10
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