| 摘要 |
A nonvolatile static random access memory (SRAM) device 200 includes a pair of cross-coupled, complementary metal oxide semiconductor (CMOS inverters II, 12 configured as a storage cell for a bit of data and a pair of magnetic spin transfer devices 202a, 202b coupled to opposing sides of the storage cell. The magnetic spin transfer devices 202a, 202b are configured to retain the storage cell data therein following removal of power to the SRAM device 200, and are further configured to initialize the storage cell with the retained data upon application of power to the SRAM device 200. |
