| 摘要 |
PROBLEM TO BE SOLVED: To provide a laminated chip capacitor capable of reducing individual capacitor size and further ESL to effectively reduce the inductance as a whole. SOLUTION: The laminated type chip capacitor includes a capacitor body that is formed by laminating a plurality of dielectric layers and has a regular hexahedral shape; at least three pairs of first and second external electrodes that are mutually and alternately disposed on each of two longer side faces opposite to the capacitor body, have different polarities, and are arranged while they face mutually; and a plurality of first and second internal electrodes that is separated by the dielectric layer in the capacitor body to be arranged mutually and alternately and are connected to the first and second external electrodes, each through a lead. In this case, the length L of the capacitor body is not smaller than 2.5 times the width W. COPYRIGHT: (C)2008,JPO&INPIT
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