MANUFACTURING METHOD OF BIT LINE FOR SEMICONDUCTOR DEVICE

摘要

A method for manufacturing a bit line of a semiconductor device is provided to reduce the resistance of a bit line and the resistance of a bit line contact by increasing a volume of tungsten within a bit line contact. An interlayer dielectric(208) is formed on a semiconductor substrate(200) including a gate and a junction region. The gate is composed of a gate insulating layer, a gate conduction layer, and a hard mask layer(206). Contact holes(H) for exposing the junction region and the gate conduction layer are formed by etching the interlayer dielectric and the hard mask layer. A CoSi2 layer(214) as an ohmic contact layer is formed on a surface of the exposed junction region. A barrier layer is formed on a surface of the contact hole including the CoSi2 layer and the interlayer dielectric. A tungsten layer(216) is deposited on the barrier layer to bury the contact hole.