发明名称 |
SYSTEM AND METHOD FOR REDUCING PEAK CURRENT AND BANDWIDTH REQUIREMENTS IN A DISPLAY DRIVER CIRCUIT |
摘要 |
A display driver circuit for reducing system interface bandwidth requirements and peak current requirements includes a select line sequencer, for providing a series of select line addresses on an address terminal set, and a select line decoder coupled to the address terminal set, for decoding each of the select line addresses and asserting an update signal on a corresponding one of a plurality of output terminals. Optionally, the select line sequencer generates a series of select sub-line addresses, and the select line decoder is a select sub-line decoder. An optional select address register receives initial select addresses from a system and provides the initial select addresses to the select line sequencer. An alternate display driver circuit including a select line sequencer and a seledct sub-line sequencer is also described.
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申请公布号 |
CA2309911(C) |
申请公布日期 |
2008.05.20 |
申请号 |
CA19982309911 |
申请日期 |
1998.11.13 |
申请人 |
AURORA SYSTEMS, INC. |
发明人 |
CAMPBELL, JOHN GRAY;HUDSON, EDWIN LYLE;WORLEY, W. SPENCER III;PINKHAM, RAYMOND |
分类号 |
G09G3/20;G09G5/00;G09G3/36 |
主分类号 |
G09G3/20 |
代理机构 |
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地址 |
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