发明名称 MEMORY CONTROLLER, FLASH MEMORY SYSTEM, AND METHOD OF CONTROLLING FLASH MEMORY
摘要 <P>PROBLEM TO BE SOLVED: To provide a memory controller, a flash memory system having the memory controller, and a method of controlling the flash memory capable of keeping the circuit scale of an error correction circuit from increasing if a plurality of flash memories are accessed in parallel. <P>SOLUTION: A flash memory system configured to access a plurality of flash memories in parallel includes an error detecting means for determining whether or not data read from the flash memories contain any error; an error correcting means for correcting errors contained in the data read from the flash memories; and a control means for controlling the error correcting means so that only the data determined to contain errors by the error detecting means is subjected to error correction. The number of the error detecting means is the same as the flash memories accessed in parallel, and the number of the error correcting means is smaller than that of the flash memories accessed in parallel. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008102693(A) 申请公布日期 2008.05.01
申请号 JP20060284003 申请日期 2006.10.18
申请人 TDK CORP 发明人 HASEGAWA HIDETOMO
分类号 G06F12/16 主分类号 G06F12/16
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