发明名称 ERASE DISCHARGE CONTROL METHOD OF NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide an erase discharge control method suitable for preventing element destruction of a flash memory during erase discharge. <P>SOLUTION: The erase discharge control method of a nonvolatile semiconductor memory device provided with a memory array in which cells of a NOR type field effect transistor are arranged in a matrix state, is provided with: a first step in which first voltage is applied to a word line, second voltage is applied to N well and P well, a bit line and a ground line are opened, electric charges accumulated in a floating gate of a floating gate type field effect transistor is extracted to a semiconductor substrate, for erasure; a second step in which successively potentials of the word line and the bit line are shifted to a ground potential, electric charges accumulated in the word line are discharged, and a discharge transistor connected to the bit line is turned on; and a third step in which after that, potentials of the N well and the P well are shifted to the ground potential, and electric charges accumulated in the N well and P well are discharged. <P>COPYRIGHT: (C)2008,JPO&INPIT</p>
申请公布号 JP2008004236(A) 申请公布日期 2008.01.10
申请号 JP20060175540 申请日期 2006.06.26
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 KURIYAMA MASAO;MURAKAMI HIROKI;NAKAGAKI YUICHIRO;HIRANO MAKOTO
分类号 G11C16/02 主分类号 G11C16/02
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