PERIOD JITTER CANCELING CIRCUIT, STATIC PHASE DIFFERENCE CANCELING CIRCUIT, PERIOD JITTER MEASURING CIRCUIT, STATIC PHASE DIFFERENCE MEASURING CIRCUIT AND PHASE DIFFERENCE ADJUSTING CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a period jitter canceling circuit capable of increasing the timing margin of a data transfer system and accelerating data transfer.

SOLUTION: The period jitter of clock signals CLK_IN is measured by the period jitter measuring circuit 3, the clock signals CLK_IN are delayed for the delay time of the period jitter canceling circuit 3 by a delay circuit 4, clock signals CLK_m are delayed so as to cancel the period jitter of the clock signals CLK_m outputted by the delay circuit 4 on the basis of a measured result in the period jitter measuring circuit 3 in a digital control delay circuit 5, and clock signals CLK_OUT for which the period jitter is canceled are obtained.

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