摘要 |
A circuit for rounding the edges of a digital pulse so as to reduce interference has a first rounding block, a second rounding block and an output stage. The first rounding block rounds the second and fourth pulse edges so as to prolong rising and falling time of the digital pulse. The second rounding block rounds the first and third pulse edges in accordance with non-linear characteristics of a semiconductor of the second rounding block. The output stage is a feedback circuit where the first rounding block is coupled with the second rounding block and the second rounding block is coupled with the feedback circuit.
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