发明名称 SEMICONDUCTOR ELEMENT INTEGRATED DEVICE, SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device by which occurrence of warpage and distortion of a semiconductor wafer can be reduced at the time of bonding, and which exhibits a high-reliability and favorable properties, and to provide a method for manufacturing the semiconductor device. SOLUTION: The semiconductor element integrated device is provided with a semiconductor wafer 1 in which the a plurality of semiconductor elements 2 are formed, a plurality of first conductor patterns 3 which are formed around each of the plurality of semiconductor elements 2, first brazing filler metal 4 which is formed on the surface of the plurality of first conductor patterns 3, second conductor patterns 5 which are formed in the peripheral region of a region R where the plurality of semiconductor elements 2 of the semiconductor wafer 1 are formed, and second brazing filler metal 6 which is provided for the surface of the second conductor patterns 5. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2007266294(A) 申请公布日期 2007.10.11
申请号 JP20060089140 申请日期 2006.03.28
申请人 KYOCERA CORP 发明人 INOUE TOMOKI
分类号 H01L23/02;H01L23/12 主分类号 H01L23/02
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