发明名称 BINARIZATION CIRCUIT AND BINARIZATION METHOD
摘要 <P>PROBLEM TO BE SOLVED: To provide a binarization circuit and binarization method in which appropriate binarization can be performed on noise regarding the binarization circuit and binarization method for binarizing an input signal. <P>SOLUTION: The present invention relates to a binarization circuit for binarizing an input signal, including: a waveform shaping circuit (111, 112) for differentiating the input signal and shaping it into a fully rectified waveform; a hold circuit (113) for holding a maximum value of signals shaped by the waveform shaping circuit (111, 112); a threshold value generating circuit (114) for generating a threshold value in accordance with the maximum value held by the hold circuit (113); a comparator circuit (115) for comparing a signal shaped by the waveform shaping circuit (111, 112) with the threshold value generated by the threshold value generating circuit (114); and an output circuit (116) for generating a signal binarizing the input signal in accordance with a result of the comparison in the comparator circuit (115). <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007174350(A) 申请公布日期 2007.07.05
申请号 JP20050370235 申请日期 2005.12.22
申请人 MITSUMI ELECTRIC CO LTD 发明人 UCHIDA TETSUO
分类号 H03M1/08;H03K5/08;H03K5/1532 主分类号 H03M1/08
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