发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS MANUFACTURING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To make the dual gate of a semiconductor integrated circuit device wherein a high withstand voltage complementary MISFET and a low withstand voltage complementary MISFET are formed on the same semiconductor substrate. SOLUTION: An energy for implanting P ions to adjust a threshold voltage of a high withstand voltage p-channel MISFET is made larger than an energy for implanting B ions to adjust a threshold voltage of a high withstand voltage n-channel MISFET. In addition, when the B ions are implanted into an undoped silicon film in a p-channel MISFET formation area so as to convert it into a p-type silicon film 9p, the concentration of B of the p-type silicon film 9p adjacent to the boundary with a gate insulating film 8 is controlled to 2×10<SP>20</SP>atoms/cm<SP>3</SP>or less. COPYRIGHT: (C)2007,JPO&INPIT
|
申请公布号 |
JP2007165361(A) |
申请公布日期 |
2007.06.28 |
申请号 |
JP20050355883 |
申请日期 |
2005.12.09 |
申请人 |
RENESAS TECHNOLOGY CORP |
发明人 |
TANIGUCHI YASUHIRO;SHIBA KAZUYOSHI;OWADA FUKUO;YAMAKOSHI HIDEAKI |
分类号 |
H01L21/8238;H01L21/8234;H01L21/8247;H01L27/088;H01L27/092;H01L27/10;H01L27/115;H01L29/788;H01L29/792 |
主分类号 |
H01L21/8238 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|