发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device where an offset distance is arranged between a gate and a source/drain diffusion layer, and an increase of parasitic capacity due to a coming off can be avoided between the source/drain diffusion layer and a channel inversion layer. SOLUTION: In an embodiment of the method of manufacturing the semiconductor device; a gate insulating film is formed on a semiconductor substrate where an element is separated, and a gate lower layer material is laminated on the semiconductor substrate through the gate insulating film. A gate upper layer material formed of a material different from the gate lower layer material is laminated on the gate lower layer material, and the gate upper layer material and the gate lower layer material are selectively worked. Thus, the gate is formed of a gate upper layer and a gate lower layer. A chemical reaction processing is performed that reactive speed of the gate upper layer is larger than the gate lower layer. A size of the gate upper layer in a horizontal direction is increased with respect to the semiconductor substrate. Ions are implanted in the semiconductor substrate with the gate upper layer as a mask, and an impurity injection region is formed. A thermal diffusion processing is performed and the source/drain diffusion layer is formed from the impurity injection region. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007134413(A) 申请公布日期 2007.05.31
申请号 JP20050323849 申请日期 2005.11.08
申请人 TOSHIBA CORP 发明人 NOMACHI EIKO;HARAKAWA HIDEAKI
分类号 H01L29/78;H01L21/265 主分类号 H01L29/78
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