发明名称 Method of forming dual damascene pattern
摘要 Disclosed is a method of forming a dual damascene pattern. The method can include forming a first etch stop layer, a first dielectric layer, a second etch stop layer, a second dielectric layer and a cap insulating layer on a substrate, forming a preliminary via hole exposing a part of the first etch stop layer by patterning the insulating layer structure, and forming a sacrificial layer pattern in the preliminary via hole. After forming a mask pattern on the cap insulating layer, a trench is formed by patterning the cap insulating layer, the second dielectric layer and a part of the sacrificial layer. The sacrificial layer pattern and the mask pattern are removed in-situ through an ashing process, thereby forming a via hole.
申请公布号 US2007082481(A1) 申请公布日期 2007.04.12
申请号 US20060546804 申请日期 2006.10.11
申请人 DONGBU ELECTRONICS CO., LTD. 发明人 JUNG SUK W.
分类号 H01L21/4763 主分类号 H01L21/4763
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