| 摘要 |
A domino register including an evaluation circuit, a write circuit, an inverter, a keeper circuit, and output logic. The evaluation circuit pre-charges a first node and evaluates a logic function for controlling a state of the first node when the clock signal goes high. The write circuit drives a second node high if the first node is low and drives the second node low if the first node stays high during evaluation. The inverter inverts the second node to control the state of a third node. The keeper circuit keeps the second node high while the third node and clock signals are both low and keeps the second node low while the third and first nodes are both high. The high and low paths of the keeper circuit are otherwise disabled, including when the write circuit changes state. Thus, the write circuit does not have to overcome a keeper device.
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