| 摘要 |
A flash memory device is disclosed that comprises memory cells, a common node, a sense node connected to a selected bit line, a first register connected to the common node, and a second register connected to the common node and the sense node. The flash memory device further comprises a common sense circuit connected to the common node, the sense node, and a control node; a switch, and a pre-charge circuit connected to the control node and configured to pre-charge the control node.
|
