发明名称 SWITCHED CAPACITOR SYSTEM WITH AND METHOD FOR OUTPUT GLITCH REDUCTION
摘要 A switched capacitor system with output glitch reduction step charges the switched capacitor by switching it to a first voltage level in a first phase, to an intermediate voltage level of a pre-charge node in a pre-charge phase and to the voltage level of the output node of the amplifier stage in a settling phase; the pre- charge node can be implemented at the input of the amplifier stage, the output of a preceding stage or at any other pre-existing suitable node in the amplifier system.
申请公布号 WO2007005407(A2) 申请公布日期 2007.01.11
申请号 WO2006US24931 申请日期 2006.06.27
申请人 ANALOG DEVICES, INC.;JOSEFSSON, OLAFUR, MAR 发明人 JOSEFSSON, OLAFUR, MAR
分类号 H03F3/45 主分类号 H03F3/45
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