发明名称 Method of reducing charging damage to integrated circuits during semiconductor manufacturing
摘要 An integrated circuit die includes thereon a first device region, a second device region and a non-active region. A first implant mask, which covers the second device region and the non-active region, while exposing the first device region, is formed over the semiconductor substrate. Dopant species are implanted into the exposed semiconductor substrate within the first device region to form first doping regions therein. A second implant mask is formed over the semiconductor substrate. The second implant mask covers the first device region, while exposing the second device region and a portion of the non-active region. Dopant species are implanted into the exposed semiconductor substrate within the second device region to form second doping regions therein.
申请公布号 US7157346(B2) 申请公布日期 2007.01.02
申请号 US20050160630 申请日期 2005.07.01
申请人 UNITED MICROELECTRONICS CORP. 发明人 CHEN KO-TING;LU WEN-BIN;LIANG CHAO-HU
分类号 H01L29/76 主分类号 H01L29/76
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