发明名称 SEMICONDUCTOR CHIP PACKAGE HAVING LEAD-FREE PLATING LAYER ON LEAD, METHOD FOR FABRICATING THE SAME AND SEMICONDUCTOR MODULE HAVING THE SAME
摘要 A semiconductor chip package having a lead-free plating layer on a lead is provided to prevent a conductive layer of an external lead from becoming a thin film in a solder reflow process by selectively forming a ceramic coating layer on the conductive layer. A package body(100) is prepared. An external lead(125) protrudes to the outside of the package body, including an upper part(125a) adjacent to the package body, a shoulder part(125b) that is extended from the upper part and has a predetermined inclination angle, and a soldering part(125c) extended from the shoulder part. A lead-free plating layer(155) is formed on the surface of the external lead. A ceramic coating layer(157) is formed on the plating layer, exposing the plating layer of the soldering part and including alumina or silica.
申请公布号 KR100652444(B1) 申请公布日期 2006.11.24
申请号 KR20050112969 申请日期 2005.11.24
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, JONG GI
分类号 H01L23/52 主分类号 H01L23/52
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