发明名称 |
Flip-Chip-Halbleiter mit Teststruktur und seine Herstellung |
摘要 |
A semiconductor device has a plurality of input/output terminals (102) formed on the inner region (1a) on a semiconductor substrate (1), and a plurality of die testing terminals (101) formed on the peripheral region (1b) on the semiconductor substrate, and the input/output terminals (102) and the die testing terminals (101) are connected to each other by a metal wiring layer (103). Die testing is performed by bringing probes projecting from a probe card into contact with the plurality of die testing terminals (101). <IMAGE> |
申请公布号 |
DE69735318(T2) |
申请公布日期 |
2006.11.02 |
申请号 |
DE1997635318T |
申请日期 |
1997.06.12 |
申请人 |
KABUSHIKI KAISHA TOSHIBA, KAWASAKI |
发明人 |
YOSHIDA, AKITO |
分类号 |
H01L21/66;H01L21/60;H01L23/58 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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