| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To manage balance between performance and power consumption in a computer system. <P>SOLUTION: The computer system 10 is disclosed comprising a clock generator circuit 14 having a clock speed register 34 and circuitry for generating a processor clock signal 32 at a frequency determined by the clock speed register 34, wherein a processor 12 performs a performance manager program 44 that writes the clock speed register 34 according to a performance state selected by application programs 50, 52. The application program 50, 52 selects the performance state to maximize performance during processor intensive functions and to maximize power conservation during interactive functions. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
