发明名称 System und Methode zur Bewegungskompensation mit Hilfe eines Schrägziegelspeicherformats für verbesserte Effizienz
摘要 An MPEG decoder system and method for decoding frames of a video sequence. The MPEG decoder includes motion compensation logic which analyzes motion vectors in an encoded frame of the MPEG stream and uses prior decoded reference blocks to recreate the data encoded by the motion vector. The MPEG decoder stores reference block data according to a novel skewed tile arrangement to minimize the maximum number of page crossings required in retrieving this data from the memory. This provides guaranteed performance and improved efficiency according to the present invention. <IMAGE>
申请公布号 DE69735402(T2) 申请公布日期 2006.10.19
申请号 DE1997635402T 申请日期 1997.12.16
申请人 LSI LOGIC CORP. 发明人 VAINSENCHER, LEONARDO
分类号 H04N5/92;H04N7/50;G06T9/00;H04N7/26;H04N7/32;H04N7/36 主分类号 H04N5/92
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