| 摘要 |
PROBLEM TO BE SOLVED: To provide an extraction method for parasitic element in a semiconductor integrated circuit by which a parasitic element is extracted with required and sufficient accuracy in a short execution time. SOLUTION: Extraction for parasitic element is executed by setting the accuracy high when the parasitic element of wiring driven by a cell with small driving capability is extracted, meanwhile, by setting the accuracy low when the parasitic element of the wiring driven by a cell with large driving capability is extracted. COPYRIGHT: (C)2006,JPO&NCIPI
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