| 摘要 |
An array substrate includes a switching device, a storage capacitor and a voltage-dividing capacitor. The switching device is formed in a pixel region defined by two gate lines adjacent to each other and two data lines adjacent to each other. The storage capacitor is electrically connected to the switching device. The voltage-dividing capacitor is disposed between the storage capacitor and one of the gate lines. The voltage-dividing capacitor is electrically connected to the storage capacitor. Therefore, an overlapping area with the data lines is reduced to reduce the RC delay and enhance aperture ratio. Furthermore, a possibility of occurrence of an electrical short is reduced. |
