| 摘要 |
The invention relates to a hub chip for connecting one or more memory chips via a respective memory chip interface, having an address input for connecting the hub chip to an address bus and having an address output for connection to a further address bus, having an address decoder unit configured to use an address applied to the address input to address one of the connected memory chips or to apply the applied address to the address output, characterized by an error recognition unit configured to use provided checking data to detect an error in a memory area of the one or more memory chips.
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