| 摘要 |
PROBLEM TO BE SOLVED: To provide a control system in which the master station of a PLC has a master station memory for storing input/output data to be transferred with a plurality of slave stations on a network for every slave station, and communicates with each slave station in order in every transmission time T2, and the CPU of a PLC for communicating through a bus with the master station receives the input data of the prior designated slave station block in the master station memory with the next time receiving slave station number Qi in every arithmetic cycle T1, and performs a sequence arithmetic operation, and transmits the output data of the slave station block acquired by that arithmetic operation, and designated with an output transmission destination slave station number Po for storing the data in the pertinent region in the master station memory, and to enable the CPU to perform the sequence arithmetic operation by acquiring the latest input data from the slave station through the master station all the time, and to transmit the output data of the arithmetic result to the slave stations without generating any delay. SOLUTION: A CPU receives a slave station number P during communication from a master station in every arithmetic cycle T1, and estimates a slave block including the nearest slave station whose communication sequence with the master station is earlier than that of the slave station of a number P, and designates it with a number Qi, and estimates the slave station including the nearest slave station whose communication sequence with the master station is later than that of the slave station of the number P, and designates it with a number Po. COPYRIGHT: (C)2006,JPO&NCIPI
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