| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a memory module for minimizing the length of wirings and solving mismatching of the impedance between wirings. <P>SOLUTION: The memory module includes: a printed circuit board; a first array of memory devices on a first side of the printed circuit board; a second array of memory devices on a second side of the printed circuit board; and multiple vias. The memory devices of the first array are arranged so as to substantially overlap, relative to a reference axis of the printed circuit board, positional-twin memory devices of the second array, respectively; and the multiple vias are parts of respective signal paths that connect signal leads of a first memory device in the first array to corresponding signal leads of a second memory device in the second array that is adjacent to a positional-twin third memory device in the second array corresponding to the first memory device. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
