发明名称 Frame-based phase-locked display controller and method thereof
摘要 A frame-based phase-locked display controller used in a display system and method thereof are described. The frame-based phase-locked display controller for displaying a plurality of image frames in a video signal comprises a frame-based phase-locked loop and a synchronization signal generator. The frame-based phase-locked loop receives an oscillating signal and an input vertical synchronous signal to generate an output clock signal by phase-lock loop based on the frames. The synchronization signal generator, coupled to the frame-based phase-locked loop, receives the output clock signal to generate an output horizontal synchronous signal, an output vertical synchronous signal and an output display enable (DE) signal. The frame-based phase-locked loop comprises a first PLL, a frequency synthesizer, a second PLL, a fast phase detector, a phase frequency detector and an active pixel region generator. The active pixel region generator receives an input vertical synchronous signal to generate a reference signal associated with an active pixel region. The frame-based phase-locked loop frame-based phase-locks the display enable signal to the reference signal.
申请公布号 US2006170823(A1) 申请公布日期 2006.08.03
申请号 US20050316290 申请日期 2005.12.22
申请人 MSTAR SEMICONDUCTOR, INC. 发明人 FANCHIANG HSU-LIN;HUNG JUI-HUNG;TSAI HUI-MIN
分类号 H04N9/475 主分类号 H04N9/475
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