发明名称 Dynamic column block selection
摘要 Selecting circuits for columns of an array of memory cells are used to hold read data or write data of the memory cells. The memory cells may be multistate memory cells. There is a shift register chain, having a stage for columns of the array. A strobe pulse is shifted through this shift register. The strobe points, with each clock, at and enables in parallel different selecting circuits in sequence. That particular selecting circuits that have been enabled by the strobe will then perform a certain function. In a read mode, the selected selecting circuits will send the stored information through to the output buffers for output from the integrated circuit, and while in a programming mode, the selected selecting circuits will receive data from input buffers. This data will be written into memory cells.
申请公布号 EP1681680(A3) 申请公布日期 2006.08.02
申请号 EP20050077828 申请日期 2002.09.17
申请人 SANDISK CORPORATION 发明人 CERNEA, PAUL ADRIAN
分类号 G11C7/10;G11C16/02;G11C16/06 主分类号 G11C7/10
代理机构 代理人
主权项
地址