发明名称 |
Reduced chip testing scheme at wafer level |
摘要 |
The present invention relates to production testing of semiconductor devices, more specifically to production testing of such devices at wafer level. A method according to the present invention comprises the steps of generating ( 20 ) quality test-data at a limited number of semiconductor devices on the wafer, deciding ( 24 ) based on the generated quality test-data whether other semiconductor devices on the wafer are to be tested, and based on the result of the deciding step, testing ( 28 ) or not testing ( 26 ) the other semiconductor devices on the wafer. A corresponding wafer prober is also described.
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申请公布号 |
US2006164114(A1) |
申请公布日期 |
2006.07.27 |
申请号 |
US20050527569 |
申请日期 |
2005.03.10 |
申请人 |
KONINKLIJKE PHILIPS ELECTRONICS N.C. |
发明人 |
CIRKEL CORNELIS O.;SCHEURWATER PIETER C.N. |
分类号 |
G01R31/26;H01L21/66;G01R31/28 |
主分类号 |
G01R31/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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