发明名称 Mit mehreren dünnen Filmen gleicher Flächenausdehnung beschichtete Unterlage zur Herstellung einer integrierten Dünnfilmschaltung
摘要 1,125,394. Printed circuits. WESTERN ELECTRIC CO. Inc. 19 Oct., 1965 [9 Nov., 1964], No. 44155/65. Heading H1R. A method of making a thin-film circuit comprises forming on a substrate in succession a resistor layer, a protective layer, and an electrode layer, and sequentially etching the layers to form the circuit, the protective layer serving to protect the resistor layer during etching of the electrode layer. As shown, Fig. 1B, a substrate 11 of glass, ceramic, glazed ceramic, &c., has the following layers deposited thereon in a continuous vacuum process: a sputtered resistor layer 12 of tantalum nitride; a protective layer 13 of sputtered tantalum pentoxide, or a mixture of tantalum, tantalum nitride, and tantalum oxide; an electrode layer 14 of tantalum; a highly conductive layer 15 of gold, copper, palladium, &c. When tantalum pentoxide is used for layer 13, tantalum layer 14 is sputtered on, so that high energy Ta atoms will perforate layer 13 and reduce its resistance to a negligible value. A first resist is applied to highly conductive layer 15 and the layer is treated with a first etchant, such as aqua regia or ferric chloride, to produce a pattern of contact and connection areas (Figs. 2A, 2B, not shown); induetors are formed at this stage if desired. The first resist is removed, and a second resist is applied to the conductive pattern and the areas of electrode layer 14 to be retained, followed by a second etching step, using e.g. an aqueous solution of nitric and hydrofluoric acids, (Figs. 3A, 3B, not shown). The second resist is removed, and a third resist applied in its place, and also to the areas of resistive layer 12 to be retained. Unwanted areas of layers 12, 13, are now removed, as with hot sodium hydroxide (Figs. 4A, 4B, not shown). After removal of the third resist, the exposed electrode area 14, which forms a lower capacitor electrode, is anodized at 32, Fig. 7B, to provide a dielectric layer; alternatively, a dielectric layer may be deposited. An upper electrode and lead layer 40, e.g. of gold, is applied, and the values of resistors are trimmed by anodization, as at 31a.
申请公布号 CH453505(A) 申请公布日期 1968.06.14
申请号 CH19650015419 申请日期 1965.11.09
申请人 WESTERN ELECTRIC COMPANY, INCORPORATED 发明人 WILLIAM BALDE,JOHN
分类号 C23F1/02;H01B1/00;H01C13/02;H01C17/06;H01G4/40;H01L27/12;H01L49/02;(IPC1-7):H01L19/00 主分类号 C23F1/02
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