| 摘要 |
Disclosed is a multilayer printed wiring board (10) comprising a core substrate (20), a buildup layer (30) which is formed on the core substrate (20) and provided with a conductive pattern (32) on the upper surface, a low-elasticity layer (40) formed on the buildup layer (30), a land (52) which is arranged on the upper surface of the low-elasticity layer (40) and connected with a semiconductor chip (70) via a solder bump (66), and a conductive post (50) penetrating the low-elasticity layer (40) for electrically connecting the land (52) and the conductive pattern (32). The diameters of top and bottom portions of the post (50) are both 80 mum, while the diameter of the intermediate portion is 35 mum. The conductive post (50) has a height of 200 mum, and the aspect ratio (Rasp) of the conductive post (50) (height/minimum diameter) is 5.7 while the ratio of the maximum diameter to the minimum diameter is 2.3. |
