| 发明名称 |
Data-modulating apparatus, data-modulating method, data-demodulating apparatus, data-demodulating method, and data-providing medium |
| 摘要 |
A SYNC bit inserting section 14 adds a sync signal to a train of codes, after adding a minimum run, said sync signal having a pattern that breaks a maximum run. It is thereby possible to provide a reliable sync signal pattern.
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| 申请公布号 |
US2006115006(A1) |
申请公布日期 |
2006.06.01 |
| 申请号 |
US20060336061 |
申请日期 |
2006.01.20 |
| 申请人 |
|
发明人 |
NAKAGAWA TOSHIYUKI;SHIMPUKU YOSHIHIDE;NARAHARA TATSUYA |
| 分类号 |
H04B14/04 |
主分类号 |
H04B14/04 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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