| 摘要 |
MOS transistor formed on a semiconductor substrate of a first conductivity type and method of fabrication are provided. The device includes (a) an interfacial layer formed on the substrate; (b) a high dielectric constant layer covering the interfacial layer that comprises a material that is selected from the group consisting of Ta<SUB>2</SUB>O<SUB>5</SUB>, Ta<SUB>2</SUB>(O<SUB>1-x</SUB>N<SUB>x</SUB>)<SUB>5 </SUB>wherein x ranges from greater than 0 to 0.6, a solid solution of (Ta<SUB>2</SUB>O<SUB>5</SUB>)<SUB>r</SUB>-(TiO<SUB>2</SUB>)<SUB>1-r </SUB>wherein r ranges from about 0.9 to less than 1, a solid solution (Ta<SUB>2</SUB>O<SUB>5</SUB>)<SUB>s</SUB>-(Al<SUB>2</SUB>O<SUB>3</SUB>)<SUB>1-s </SUB>wherein s ranges from 0.9 to less than 1, a solid solution of (Ta<SUB>2</SUB>O<SUB>5</SUB>)<SUB>t</SUB>-(ZrO<SUB>2</SUB>)<SUB>1-t </SUB>wherein t ranges from about 0.9 to less than 1, a solid solution of (Ta<SUB>2</SUB>O<SUB>5</SUB>)<SUB>u</SUB>-(HfO<SUB>2</SUB>)<SUB>1-u </SUB>wherein u ranges from about 0.9 to less than 1, and mixtures thereof wherein the interfacial layer separates the high dielectric constant layer from the substrate; (b) a gate electrode having a width of less than 0.3 micron covering the high dielectric constant layer; (d) first and second lightly doped regions of a second conductivity type disposed on respective areas of the substrate surface; (e) a source and drain regions of the second conductivity type; and (f) a pair of spacers formed adjacent to the gate electrode and formed on the high dielectric constant layer. The high dielectric layer can be subject to densification. The gate oxide material will significantly improve the performance of an MOS device by reducing or eliminating the current leakage associated with prior art devices.
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