发明名称 Semiconductor memory having a spare memory cell
摘要 A semiconductor memory encompasses a memory cell array having a spare memory cell array; a holding circuit having banks of fuses, configured to read and hold fuse information; a decision circuit configured to determine which address of memory cell is to be replaced with which spare memory cell based on the fuse information from the holding circuit; and a holding-controller configured to control reading and holding of the fuse information in the holding circuit by receiving a power supply completion signal and a refresh signal. The holding circuit rereads the fuse information when the reread signal is generated, after the holding circuit reads once the fuse information by receiving the power supplying completion signal.
申请公布号 US7038969(B2) 申请公布日期 2006.05.02
申请号 US20040940635 申请日期 2004.09.15
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 HAMADA MAKOTO;MURAOKA KAZUYOSHI;YOSHIHARA MASAHIRO
分类号 G11C7/00;G11C11/413;G11C29/02;G11C29/04 主分类号 G11C7/00
代理机构 代理人
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